In a graphics display device, such as an LCD (Liquid Crystal Display) panel, video data for display as well as instructions for displaying the data are provided by a host. In principle, any host can interface directly with a display device provided that the host's read/write operations conform to the protocol specified for the display device. However, it is often desirable to provide an application specific graphics display controller as a separate chip, such as an LCD controller, between the host and the display device to provide specialized functions. For example, a display controller chip might be used to automate the transfer of images from a camera to graphics display device, or to allow a host having a parallel bus to interface with a graphics display device having a serial interface and vice versa.
A specific example of such a display controller chip is found in a cellular telephone. The telephone includes a microprocessor functioning as a host CPU, and typically includes one or more RAM (“Random Access Memory”)-integrated LCD panels which, for purposes herein, may be considered elements of a single graphics display device. The term “RAM-integrated” refers to the incorporation in the graphics display device of a display or frame buffer.
The display controller chip includes input and output interfaces and a format converter for offloading from the host the task of converting the video data into the format required by the graphics display device, for example, by translating the data from one color space to another. In telephone and other systems used for data communications, such display controllers are used for both wireless and wired communications.
The host generally provides video data and commands to the graphics display device, e.g., to enable selected panels and to specify display parameters such as image size and color resolution. The host may also read data from the display device. For example, the host may read status bits in the display device, or the host may read images from the display device.
Where a display controller is provided, the host communicates with the display device through the controller rather than directly with the display device. Accordingly, the display controller is provided with an embedded memory for reading video data from the host and for writing video data to the display device.
More particularly, there are two known means for writing video data from the host to the RAM-integrated graphics display device through the display controller. First, the host may transmit a full image frame of pixels in a sequential stream to the display controller. The display controller stores the frame in the embedded memory, and formats the data using the format converter. A disadvantage of this method is that a complete frame of data must be transferred in order to change any portion of the display.
Alternatively, the host may write control data to respective command and parameter registers in the display controller. The display controller transfers the data directly to the graphics display device without storing it in the embedded memory or converting its format. However, the host may be required to format the display data prior to transmission, thus losing the benefit of the format converter provided by the display controller.
Recently, the capability to read data from the RAM-integrated graphics display device has been provided by the graphics display controller. The host writes to a register bit in the display controller to trigger a read cycle in the graphics display device. Data from the graphics display device is placed into registers in the controller, in the native format of the graphics display device. However, the host may be required to re-format the data to interpret the data, because the format converter is typically adapted to format data transmitted to the display device and is not bidirectional.
Graphics display controllers typically provide for a fully powered on mode of operation, and an essentially fully powered off or “pass-through” mode where the controller simply passes through data and commands received from the host to the graphics display device. In the fully powered off mode, the host must format the video data. In the pass-through mode, the controller's embedded memory along with its related controlling logic are powered up even when using a writing or reading methodology that does not make use of it. Accordingly, there is a need for a graphics display controller providing enhanced read/write efficiency for interfacing with a RAM-integrated graphics display device.